Thursday, October 13, 2011

A new project

Image by Digilent Inc.
I recently found myself with some extra time, and being that it has been a while since I've done a extra-circular project, I've decided to find something to do.
Last year in my Senior Seminar class I managed to create a small System on a Chip FPGA project based off the Hack platform in The Elements of Computing Systems. TECS was an amazing book and I would recommend it to anybody becoming interested lower level systems.
While building Hack was a challenging experience, I clearly see the shortcomings of my design.




Possibly the component with the largest issues was my memory controller. My Nexys2 has a small SRAM which I had originally intended to use as Hack's primary memory. I had unbelievable issues with this, and in the end I used the FPGA's tiny internal BRAM for Hack's main memory. This limited me to extremely small programs to the point where I couldn't do much of anything. Hack had other issues, but they were completely overshadowed by the bram size. I still can't write a decent memory controller, and I still don't know the proper way to share time between the CPU and VGA.

This leads to the first goal, interface with the external SRAM elegantly with proper arbitration between VGA and 'work'.

The second issue I had was with VHDL itself. I found it awkward to use, and had a difficult time expressing what I wanted to intend. I've used Verilog before, but its about time I learn how to do things properly.

Second goal, use Verilog!

I have been evaluating some ideas for projects, and I've decided on implementing Conway's Game of Life. It has simple rules, simple data layouts, and is easily conceptually scaled. I plan to iteratively design this, starting small and stopping when I get bored.

I see this project happening iteratively, in more or less this order.

  1. Arbitrarily sized game   Update 1
  2. Arbitrarily sized game w/ VGA display
  3. Arbitrarily sized game in SRAM
  4. Arbitrarily sized game in SRAM w/ VGA display
This is significantly less complex that my System on a Chip I built for class, however I want to do this 'right'. My VHDL and digital design weren't founded in anything other than what I thought was a good idea at the time. 

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